fibers B1.0b: abi(.pure) emits a real LLVM naked function (green)
Flip the B1.0a emit bail to real emission. The emit_llvm declaration pass now adds LLVM's naked + noinline + nounwind attributes for an is_pure function and skips frame-pointer=all (incompatible with a frameless function); Pass 2 emits the body normally, and the naked attribute makes the backend emit it verbatim (the inline asm + its own ret) with no prologue/epilogue. IR shape verified: ; Function Attrs: naked noinline nounwind define internal i64 @answer() #0 { entry: call void asm sideeffect "...ret...", ""() unreachable } The caller invokes it as an ordinary () -> i64 call (.pure is call_conv == .default). - examples/1800-concurrency-pure-asm.sx: now green, aarch64-pinned (.build macos) -> exit 42 + .ir snapshot. - examples/1801-concurrency-pure-generic.sx (renamed from -bail): the generic .pure now emits a correct naked answer__i64 (exit 42), proving generic.zig produces a naked body, not a framed one. - examples/1802-concurrency-pure-asm-x86.sx: x86_64 cross sibling (.build x86_64-linux, ir-only here); .ir locks naked + movl $42,%eax. - unit test in emit_llvm.test.zig asserts the naked attribute is present and frame-pointer absent on an abi(.pure) function. Suite green (724/0).
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examples/expected/1800-concurrency-pure-asm.build
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examples/expected/1800-concurrency-pure-asm.build
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{ "target": "macos" }
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@@ -1 +1 @@
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1
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42
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examples/expected/1800-concurrency-pure-asm.ir
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examples/expected/1800-concurrency-pure-asm.ir
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; Function Attrs: naked noinline nounwind
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define internal i64 @answer() #0 {
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entry:
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call void asm sideeffect " mov x0, #42\0A ret\0A", ""()
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unreachable
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}
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; Function Attrs: nounwind
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define i32 @main() #1 {
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entry:
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%call = call i64 @answer()
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%ca.tr = trunc i64 %call to i32
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ret i32 %ca.tr
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}
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@@ -1 +1 @@
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error: `abi(.pure)` function 'answer' LLVM emission not yet implemented
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@@ -1 +0,0 @@
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1
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error: `abi(.pure)` function 'answer__i64' LLVM emission not yet implemented
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examples/expected/1801-concurrency-pure-generic.build
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examples/expected/1801-concurrency-pure-generic.build
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{ "target": "macos" }
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examples/expected/1801-concurrency-pure-generic.exit
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examples/expected/1801-concurrency-pure-generic.exit
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42
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examples/expected/1801-concurrency-pure-generic.ir
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examples/expected/1801-concurrency-pure-generic.ir
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; Function Attrs: nounwind
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define i32 @main() #0 {
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entry:
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%call = call i64 @answer__i64()
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%ca.tr = trunc i64 %call to i32
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ret i32 %ca.tr
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}
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; Function Attrs: naked noinline nounwind
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define internal i64 @answer__i64() #1 {
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entry:
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call void asm sideeffect " mov x0, #42\0A ret\0A", ""()
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unreachable
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}
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examples/expected/1801-concurrency-pure-generic.stdout
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examples/expected/1801-concurrency-pure-generic.stdout
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examples/expected/1802-concurrency-pure-asm-x86.build
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examples/expected/1802-concurrency-pure-asm-x86.build
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{ "target": "x86_64-linux" }
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examples/expected/1802-concurrency-pure-asm-x86.exit
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examples/expected/1802-concurrency-pure-asm-x86.exit
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0
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examples/expected/1802-concurrency-pure-asm-x86.ir
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examples/expected/1802-concurrency-pure-asm-x86.ir
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; Function Attrs: naked noinline nounwind
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define internal i64 @answer() #0 {
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entry:
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call void asm sideeffect " movl $$42, %eax\0A ret\0A", ""()
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unreachable
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}
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; Function Attrs: nounwind
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define i32 @main() #1 {
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entry:
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%call = call i64 @answer()
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%ca.tr = trunc i64 %call to i32
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ret i32 %ca.tr
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}
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examples/expected/1802-concurrency-pure-asm-x86.stderr
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examples/expected/1802-concurrency-pure-asm-x86.stderr
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