atomics A.1a: RMW ops + recognizer + methods, emit bails (lock)

fetch_add/sub/and/or/xor/min/max wired end-to-end except LLVM emission (bails
loudly; A.1b makes it real). New IR op atomic_rmw + RmwKind (no nand) +
AtomicRmw{ptr, operand, val_ty, ordering, kind}. print arm; comptime_vm arm
implements real single-thread RMW (load/compute/store/return-old, signed|unsigned
min/max from val_ty). Recognizer extended (rmwKindFromName) — RMW restricted to
integer T (float fadd / pointer RMW out of scope, rejected loudly); all orderings
valid for RMW. Methods fetch_* on Atomic($T) with comptime $o: Ordering.
examples/1701 locked to the bail. Suite green (716/0).

src/backend/llvm/ops.zig

@@ -17,6 +17,7 @@ const Subslice = ir_inst.Subslice;
 const Store = ir_inst.Store;
 const AtomicLoad = ir_inst.AtomicLoad;
 const AtomicStore = ir_inst.AtomicStore;
+const AtomicRmw = ir_inst.AtomicRmw;
 const Conversion = ir_inst.Conversion;
 const GlobalId = ir_inst.GlobalId;
 const GlobalSet = ir_inst.GlobalSet;
@@ -395,6 +396,15 @@ pub const Ops = struct {
         }
     }
 
+    // A.1a (Stream A) lock: emission BAILS LOUDLY until A.1b wires the real
+    // LLVMBuildAtomicRMW (binop from kind; signed/unsigned Min/Max from val_ty).
+    pub fn emitAtomicRmw(self: Ops, instruction: *const Inst, a: AtomicRmw) void {
+        _ = a;
+        std.debug.print("error: atomic rmw LLVM emission not yet implemented (Stream A, A.1b)\n", .{});
+        self.e.comptime_failed = true;
+        self.e.mapRef(c.LLVMGetUndef(self.e.toLLVMType(if (instruction.ty == .void) .i64 else instruction.ty)));
+    }
+
     pub fn emitAtomicStore(self: Ops, a: AtomicStore) void {
         const ptr = self.e.resolveRef(a.ptr);
         var val = self.e.resolveRef(a.val);