From b97da83e8b59d6f2f3a0f1c6da1798b830f12570 Mon Sep 17 00:00:00 2001 From: agra Date: Sat, 20 Jun 2026 18:57:14 +0300 Subject: [PATCH] fibers: commit the abi(.naked) example bodies (rename staging miss) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .pure->.naked rename (a7fe165) git-mv'd examples 1800-1803 to their naked names but the perl content edit (abi(.pure) -> abi(.naked) in the bodies/comments) was never re-staged, so HEAD carried the renamed files with stale abi(.pure) bodies — which the compiler now rejects ("unknown ABI"). The working tree had the correct .naked bodies uncommitted; this commits them so HEAD parses + builds clean. --- examples/1800-concurrency-naked-asm.sx | 6 +++--- examples/1801-concurrency-naked-generic.sx | 12 ++++++------ examples/1802-concurrency-naked-asm-x86.sx | 4 ++-- examples/1803-concurrency-naked-asm-param.sx | 8 ++++---- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/examples/1800-concurrency-naked-asm.sx b/examples/1800-concurrency-naked-asm.sx index 629e1be4..0abeff05 100644 --- a/examples/1800-concurrency-naked-asm.sx +++ b/examples/1800-concurrency-naked-asm.sx @@ -1,6 +1,6 @@ -// Stream B1 (fibers) — `abi(.pure)` emits a naked function end-to-end. +// Stream B1 (fibers) — `abi(.naked)` emits a naked function end-to-end. // -// An `abi(.pure)` function has no calling-convention prologue/epilogue/frame +// An `abi(.naked)` function has no calling-convention prologue/epilogue/frame // and no implicit `__sx_ctx`: its body is a single asm block that sets the // return register and emits its own `ret`. This is the substrate the per-arch // fiber context-switch is built on (design §4.6) — a `.c` epilogue would @@ -13,7 +13,7 @@ // mismatch. See the x86_64 sibling 1802. NOTE: the `.ir` proves the `naked` // keyword + asm emitted, NOT register-save correctness (that's the B1.3 // switch-stress harness's job). -answer :: () -> i64 abi(.pure) { +answer :: () -> i64 abi(.naked) { asm volatile { #string ASM mov x0, #42 diff --git a/examples/1801-concurrency-naked-generic.sx b/examples/1801-concurrency-naked-generic.sx index 491946a1..f1252811 100644 --- a/examples/1801-concurrency-naked-generic.sx +++ b/examples/1801-concurrency-naked-generic.sx @@ -1,16 +1,16 @@ -// Stream B1 (fibers) — `abi(.pure)` on a GENERIC function emits a correct naked +// Stream B1 (fibers) — `abi(.naked)` on a GENERIC function emits a correct naked // body (regression for an adversarial-review finding). // // A generic function is monomorphized through a different Function-creation path -// (lower/generic.zig) than a plain decl. That path originally left `is_pure` -// unset, so a generic `abi(.pure)` instance silently shipped a FRAMED body — it +// (lower/generic.zig) than a plain decl. That path originally left `is_naked` +// unset, so a generic `abi(.naked)` instance silently shipped a FRAMED body — it // returned 42 but leaked the prologue's stack adjustment (the exact SP-in ≠ -// SP-out corruption the `.pure` ABI exists to avoid). generic.zig (and the -// sibling pack-expansion path in pack.zig) now set `is_pure` and emit the +// SP-out corruption the `.naked` ABI exists to avoid). generic.zig (and the +// sibling pack-expansion path in pack.zig) now set `is_naked` and emit the // asm-only naked body. This pins that: the monomorphized `answer__i64` is a // proper naked function (no frame), returning 42. aarch64-pinned (the asm body // is per-arch); runs end-to-end on a matching host, ir-only elsewhere. -answer :: ($T: Type) -> i64 abi(.pure) { +answer :: ($T: Type) -> i64 abi(.naked) { asm volatile { #string A mov x0, #42 diff --git a/examples/1802-concurrency-naked-asm-x86.sx b/examples/1802-concurrency-naked-asm-x86.sx index 2f562545..8726553d 100644 --- a/examples/1802-concurrency-naked-asm-x86.sx +++ b/examples/1802-concurrency-naked-asm-x86.sx @@ -1,4 +1,4 @@ -// Stream B1 (fibers) — x86_64 sibling of 1800: `abi(.pure)` emits a naked +// Stream B1 (fibers) — x86_64 sibling of 1800: `abi(.naked)` emits a naked // function whose body is raw x86_64 asm (returns 42 in eax, then its own `ret`). // // Lowered via LLVM's `naked` attribute (no prologue/epilogue/frame). x86_64- @@ -7,7 +7,7 @@ // frame-pointer-free attribute set — and runs end-to-end (exit 42) on // x86_64-linux. The IR text (the `naked` attribute, the `call void asm`) is // target-independent; only the asm string differs from the aarch64 1800. -answer :: () -> i64 abi(.pure) { +answer :: () -> i64 abi(.naked) { asm volatile { #string A movl $42, %eax diff --git a/examples/1803-concurrency-naked-asm-param.sx b/examples/1803-concurrency-naked-asm-param.sx index 9da05e67..5568c86d 100644 --- a/examples/1803-concurrency-naked-asm-param.sx +++ b/examples/1803-concurrency-naked-asm-param.sx @@ -1,19 +1,19 @@ -// Stream B1 (fibers) — an `abi(.pure)` function with PARAMETERS reads its args +// Stream B1 (fibers) — an `abi(.naked)` function with PARAMETERS reads its args // from ABI registers (the shape the fiber context-switch needs: `swap_context` // reads `from`/`to` from x0/x1). // // A naked function has no frame, so params are NOT spilled to stack slots — they // stay in their ABI registers and the asm body reads them directly. Here `a` is // in x0, `b` in x1 (aarch64 AAPCS), and the result returns in x0: `add x0, x0, -// x1`. The lowering skips the param-alloca loop for `.pure` (decl.zig / +// x1`. The lowering skips the param-alloca loop for `.naked` (decl.zig / // generic.zig); the LLVM args are declared-but-unused, which the verifier allows // (spilling them would emit `store i64 %0, …` → "cannot use argument of naked // function"). aarch64-pinned; runs end-to-end (exit 42), ir-only on a mismatch. // // Regression for an adversarial-review finding: before the param-alloca guard, a -// param-bearing `.pure` fn emitted invalid LLVM (loud verifier error) instead of +// param-bearing `.naked` fn emitted invalid LLVM (loud verifier error) instead of // a working naked function. -add :: (a: i64, b: i64) -> i64 abi(.pure) { +add :: (a: i64, b: i64) -> i64 abi(.naked) { asm volatile { #string A add x0, x0, x1