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issue 0152 RESOLVED: byte-promote sub-byte (Atomic(bool)) atomic load/store

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LLVM rejects a sub-byte atomic memory access (must be byte-sized), so
Atomic(bool) — bool lowers to i1 — failed verification on load/store. The
atomic emitters in src/backend/llvm/ops.zig now perform a sub-byte access in
its byte storage type (i8) and trunc/zext the value at the boundary (new
atomicByteType helper: i8 for .bool, null otherwise). rmw/cmpxchg are left
as-is on purpose — a bool rmw/CAS is rejected at the sx level (integer-only),
so a sub-byte element never reaches those emitters.

Regression test examples/1705-atomics-bool-byte-promoted.sx. Suite green 729/0.
Unblocks Future.canceled: Atomic(bool) in the B1.2 async layer.
This commit is contained in:
agra
2026-06-21 05:42:48 +03:00
parent ea1faf7b69
commit e5586f61b8
6 changed files with 86 additions and 4 deletions
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36
src/backend/llvm/ops.zig
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@@ -384,14 +384,32 @@ pub const Ops = struct {
};
}
// An atomic access type MUST be byte-sized — LLVM rejects a sub-byte
// (i1) atomic load/store/rmw/cmpxchg. `bool` lowers to `i1`, so an
// `Atomic(bool)` op is performed in its byte-sized storage type (`i8`)
// and the value `trunc`/`zext`'d at the boundary. `bool` is the only
// sub-byte scalar in sx (atomics are integer/bool/pointer only), so the
// promotion is a `bool → i8` special-case rather than a general width
// round-up. Returns null when no promotion is needed (the type is
// already byte-sized) — callers then use it as-is.
fn atomicByteType(self: Ops, ir_ty: TypeId) ?c.LLVMTypeRef {
return if (ir_ty == .bool) self.e.cached_i8 else null;
}
pub fn emitAtomicLoad(self: Ops, instruction: *const Inst, a: AtomicLoad) void {
const ptr = self.e.resolveRef(a.ptr);
const ptr_kind = c.LLVMGetTypeKind(c.LLVMTypeOf(ptr));
if (ptr_kind == c.LLVMPointerTypeKind and instruction.ty != .void) {
const llvm_ty = self.e.toLLVMType(instruction.ty);
const result = c.LLVMBuildLoad2(self.e.builder, llvm_ty, ptr, "atomic_load");
c.LLVMSetOrdering(result, llvmOrdering(a.ordering));
c.LLVMSetAlignment(result, @intCast(self.e.ir_mod.types.typeSizeBytes(instruction.ty)));
const promoted = self.atomicByteType(instruction.ty);
const llvm_ty = promoted orelse self.e.toLLVMType(instruction.ty);
const raw = c.LLVMBuildLoad2(self.e.builder, llvm_ty, ptr, "atomic_load");
c.LLVMSetOrdering(raw, llvmOrdering(a.ordering));
c.LLVMSetAlignment(raw, @intCast(self.e.ir_mod.types.typeSizeBytes(instruction.ty)));
// Narrow the byte-sized load back to the value type (i8 → i1).
const result = if (promoted != null)
c.LLVMBuildTrunc(self.e.builder, raw, self.e.toLLVMType(instruction.ty), "atomic_load.nb")
else
raw;
self.e.mapRef(result);
} else {
self.e.mapRef(c.LLVMGetUndef(self.e.toLLVMType(if (instruction.ty == .void) .i64 else instruction.ty)));
@@ -420,6 +438,9 @@ pub const Ops = struct {
const val = self.e.resolveRef(a.operand);
const ptr_kind = c.LLVMGetTypeKind(c.LLVMTypeOf(ptr));
if (ptr_kind == c.LLVMPointerTypeKind and instruction.ty != .void) {
// No sub-byte promotion here: `Atomic(bool)` rmw is rejected at the
// sx level ("requires an integer type"), so a sub-byte element can
// never reach this emitter (unlike load/store, which bool uses).
const is_unsigned = self.e.ir_mod.types.isUnsignedInt(a.val_ty);
const result = c.LLVMBuildAtomicRMW(self.e.builder, rmwBinOp(a.kind, is_unsigned), ptr, val, llvmOrdering(a.ordering), 0);
self.e.mapRef(result);
@@ -441,6 +462,8 @@ pub const Ops = struct {
const new = self.e.resolveRef(a.new);
const ptr_kind = c.LLVMGetTypeKind(c.LLVMTypeOf(ptr));
if (ptr_kind == c.LLVMPointerTypeKind and instruction.ty != .void) {
// No sub-byte promotion: `Atomic(bool)` cmpxchg is rejected at the
// sx level (integer-only), so a sub-byte element never reaches here.
const pair = c.LLVMBuildAtomicCmpXchg(
self.e.builder,
ptr,
@@ -497,6 +520,11 @@ pub const Ops = struct {
self.e.advanceRefCounter();
return;
}
// Widen a sub-byte value (bool/i1) to its byte storage type so the
// atomic store is byte-sized (LLVM rejects an i1 atomic).
if (self.atomicByteType(a.val_ty)) |byte_ty| {
val = c.LLVMBuildZExt(self.e.builder, val, byte_ty, "atomic_store.nb");
}
const st = c.LLVMBuildStore(self.e.builder, val, ptr);
c.LLVMSetOrdering(st, llvmOrdering(a.ordering));
c.LLVMSetAlignment(st, @intCast(self.e.ir_mod.types.typeSizeBytes(a.val_ty)));