From fca4304f8300b2033f0b9fab16c7bd28b39764cd Mon Sep 17 00:00:00 2001 From: agra Date: Sat, 20 Jun 2026 13:47:08 +0300 Subject: [PATCH] atomics A.3a: swap + fence ops + recognizer, emit bails (lock) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit swap (atomicrmw xchg) and a standalone fence wired end-to-end except LLVM emission (both bail loudly; A.3b makes them real). - RmwKind += xchg; atomic_swap intrinsic + swap method reuse the atomic_rmw op. - new atomic_fence op (+ AtomicFence) — ordering-only, void; fence($o)/atomic_fence intrinsic; recognizer rejects .relaxed (LLVM has no monotonic fence). - comptime_vm: xchg = store operand/return old; fence = no-op (single-thread). - examples 1703 (swap) + 1704 (fence) locked to bails; 1187 (relaxed-fence reject). - 1186 converted to a direct-intrinsic call → stable user-file diagnostic span (the lib-forward-site span shifted when atomic.sx grew — fragile-snapshot fix). Also fixes a latent A.2 comptime-CAS bug found while here: the success/null has_value write was 'writeWord(addr, SIZE=0, val=1)' — a 0-byte no-op, correct ONLY because allocBytes zero-inits (REJECTED-PATTERNS 'coincidentally correct'). Now writes the flag explicitly (size=1, val=0). Suite green (721/0). --- .../1186-diagnostics-atomic-cas-ordering.sx | 7 ++++--- .../1187-diagnostics-atomic-fence-relaxed.sx | 8 ++++++++ examples/1703-atomics-swap.sx | 11 ++++++++++ examples/1704-atomics-fence.sx | 15 ++++++++++++++ ...186-diagnostics-atomic-cas-ordering.stderr | 6 +++--- ...1187-diagnostics-atomic-fence-relaxed.exit | 1 + ...87-diagnostics-atomic-fence-relaxed.stderr | 5 +++++ ...87-diagnostics-atomic-fence-relaxed.stdout | 1 + examples/expected/1703-atomics-swap.exit | 1 + examples/expected/1703-atomics-swap.stderr | 1 + examples/expected/1703-atomics-swap.stdout | 1 + examples/expected/1704-atomics-fence.exit | 1 + examples/expected/1704-atomics-fence.stderr | 3 +++ examples/expected/1704-atomics-fence.stdout | 1 + library/modules/std/atomic.sx | 11 ++++++++++ src/backend/llvm/ops.zig | 19 ++++++++++++++++++ src/ir/comptime_vm.zig | 12 +++++++++-- src/ir/emit_llvm.zig | 1 + src/ir/inst.zig | 9 ++++++++- src/ir/lower/call.zig | 20 +++++++++++++++++++ src/ir/print.zig | 4 ++++ 21 files changed, 129 insertions(+), 9 deletions(-) create mode 100644 examples/1187-diagnostics-atomic-fence-relaxed.sx create mode 100644 examples/1703-atomics-swap.sx create mode 100644 examples/1704-atomics-fence.sx create mode 100644 examples/expected/1187-diagnostics-atomic-fence-relaxed.exit create mode 100644 examples/expected/1187-diagnostics-atomic-fence-relaxed.stderr create mode 100644 examples/expected/1187-diagnostics-atomic-fence-relaxed.stdout create mode 100644 examples/expected/1703-atomics-swap.exit create mode 100644 examples/expected/1703-atomics-swap.stderr create mode 100644 examples/expected/1703-atomics-swap.stdout create mode 100644 examples/expected/1704-atomics-fence.exit create mode 100644 examples/expected/1704-atomics-fence.stderr create mode 100644 examples/expected/1704-atomics-fence.stdout diff --git a/examples/1186-diagnostics-atomic-cas-ordering.sx b/examples/1186-diagnostics-atomic-cas-ordering.sx index 4ecad15d..a82d42b5 100644 --- a/examples/1186-diagnostics-atomic-cas-ordering.sx +++ b/examples/1186-diagnostics-atomic-cas-ordering.sx @@ -1,11 +1,12 @@ // Atomic compare-exchange dual-ordering validation: the FAILURE ordering may not // be stronger than the SUCCESS ordering (LLVM rule). Here failure=.seq_cst (rank // 3) is stronger than success=.relaxed (rank 0) → loud diagnostic, not invalid IR. -// Stream A (atomics) A.2. +// Calls the intrinsic directly so the diagnostic span is stable (user file, not +// the lib forward site). Stream A (atomics) A.2. #import "modules/std.sx"; #import "modules/std/atomic.sx"; main :: () { - a := Atomic(i64).init(0); - _ := a.compare_exchange(0, 1, .relaxed, .seq_cst); + n : i64 = 0; + _ := atomic_cmpxchg(i64, @n, 0, 1, .relaxed, .seq_cst); } diff --git a/examples/1187-diagnostics-atomic-fence-relaxed.sx b/examples/1187-diagnostics-atomic-fence-relaxed.sx new file mode 100644 index 00000000..0e89d31b --- /dev/null +++ b/examples/1187-diagnostics-atomic-fence-relaxed.sx @@ -0,0 +1,8 @@ +// A fence with .relaxed ordering is rejected (LLVM has no monotonic/unordered +// fence). Stream A (atomics) guard. +#import "modules/std.sx"; +#import "modules/std/atomic.sx"; + +main :: () { + atomic_fence(.relaxed); +} diff --git a/examples/1703-atomics-swap.sx b/examples/1703-atomics-swap.sx new file mode 100644 index 00000000..f87995c6 --- /dev/null +++ b/examples/1703-atomics-swap.sx @@ -0,0 +1,11 @@ +// Atomic($T).swap — atomic exchange (LLVM atomicrmw xchg): store the new value, +// return the OLD one. Stream A (atomics) A.3. Single-thread. +#import "modules/std.sx"; +#import "modules/std/atomic.sx"; + +main :: () { + a := Atomic(i64).init(7); + old := a.swap(42, .acq_rel); + print("swap old: {}\n", old); // 7 + print("swap now: {}\n", a.load(.acquire)); // 42 +} diff --git a/examples/1704-atomics-fence.sx b/examples/1704-atomics-fence.sx new file mode 100644 index 00000000..1fd4303a --- /dev/null +++ b/examples/1704-atomics-fence.sx @@ -0,0 +1,15 @@ +// Standalone memory fence — fence(.ordering) → LLVM fence. Stream A (atomics) A.3. +// (.relaxed is rejected; see 1187.) Single-thread: a fence is observable only as +// "compiled + ran without error" here. +#import "modules/std.sx"; +#import "modules/std/atomic.sx"; + +main :: () { + a := Atomic(i64).init(1); + a.store(2, .relaxed); + fence(.release); + a.store(3, .relaxed); + fence(.acquire); + fence(.seq_cst); + print("after fences: {}\n", a.load(.relaxed)); // 3 +} diff --git a/examples/expected/1186-diagnostics-atomic-cas-ordering.stderr b/examples/expected/1186-diagnostics-atomic-cas-ordering.stderr index d5ac71d7..2f6abeac 100644 --- a/examples/expected/1186-diagnostics-atomic-cas-ordering.stderr +++ b/examples/expected/1186-diagnostics-atomic-cas-ordering.stderr @@ -1,5 +1,5 @@ error: atomic compare-exchange failure ordering ('.seq_cst') cannot be stronger than the success ordering ('.relaxed') - --> /Users/agra/projects/sx/library/modules/std/atomic.sx:79:188 + --> examples/1186-diagnostics-atomic-cas-ordering.sx:11:50 | -79 | compare_exchange :: (self: *Atomic(T), expected: T, desired: T, $success: Ordering, $failure: Ordering) -> ?T { return atomic_cmpxchg(T, @self.value, expected, desired, success, failure); } - | ^^^^^^^ +11 | _ := atomic_cmpxchg(i64, @n, 0, 1, .relaxed, .seq_cst); + | ^^^^^^^^ diff --git a/examples/expected/1187-diagnostics-atomic-fence-relaxed.exit b/examples/expected/1187-diagnostics-atomic-fence-relaxed.exit new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/examples/expected/1187-diagnostics-atomic-fence-relaxed.exit @@ -0,0 +1 @@ +1 diff --git a/examples/expected/1187-diagnostics-atomic-fence-relaxed.stderr b/examples/expected/1187-diagnostics-atomic-fence-relaxed.stderr new file mode 100644 index 00000000..aa3e84cd --- /dev/null +++ b/examples/expected/1187-diagnostics-atomic-fence-relaxed.stderr @@ -0,0 +1,5 @@ +error: fence ordering cannot be .relaxed (use .acquire / .release / .acq_rel / .seq_cst) + --> examples/1187-diagnostics-atomic-fence-relaxed.sx:7:18 + | + 7 | atomic_fence(.relaxed); + | ^^^^^^^^ diff --git a/examples/expected/1187-diagnostics-atomic-fence-relaxed.stdout b/examples/expected/1187-diagnostics-atomic-fence-relaxed.stdout new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/examples/expected/1187-diagnostics-atomic-fence-relaxed.stdout @@ -0,0 +1 @@ + diff --git a/examples/expected/1703-atomics-swap.exit b/examples/expected/1703-atomics-swap.exit new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/examples/expected/1703-atomics-swap.exit @@ -0,0 +1 @@ +1 diff --git a/examples/expected/1703-atomics-swap.stderr b/examples/expected/1703-atomics-swap.stderr new file mode 100644 index 00000000..317306d7 --- /dev/null +++ b/examples/expected/1703-atomics-swap.stderr @@ -0,0 +1 @@ +error: atomic swap (xchg) LLVM emission not yet implemented (Stream A, A.3b) diff --git a/examples/expected/1703-atomics-swap.stdout b/examples/expected/1703-atomics-swap.stdout new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/examples/expected/1703-atomics-swap.stdout @@ -0,0 +1 @@ + diff --git a/examples/expected/1704-atomics-fence.exit b/examples/expected/1704-atomics-fence.exit new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/examples/expected/1704-atomics-fence.exit @@ -0,0 +1 @@ +1 diff --git a/examples/expected/1704-atomics-fence.stderr b/examples/expected/1704-atomics-fence.stderr new file mode 100644 index 00000000..ed224ceb --- /dev/null +++ b/examples/expected/1704-atomics-fence.stderr @@ -0,0 +1,3 @@ +error: atomic fence LLVM emission not yet implemented (Stream A, A.3b) +error: atomic fence LLVM emission not yet implemented (Stream A, A.3b) +error: atomic fence LLVM emission not yet implemented (Stream A, A.3b) diff --git a/examples/expected/1704-atomics-fence.stdout b/examples/expected/1704-atomics-fence.stdout new file mode 100644 index 00000000..8b137891 --- /dev/null +++ b/examples/expected/1704-atomics-fence.stdout @@ -0,0 +1 @@ + diff --git a/library/modules/std/atomic.sx b/library/modules/std/atomic.sx index 62a4af95..53aa632a 100644 --- a/library/modules/std/atomic.sx +++ b/library/modules/std/atomic.sx @@ -33,6 +33,14 @@ atomic_fetch_xor :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin; atomic_fetch_min :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin; atomic_fetch_max :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin; +// Swap (exchange): store `operand`, return the OLD value. Integer T. +atomic_swap :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin; + +// Standalone memory fence. The ordering may NOT be `.relaxed` (LLVM has no +// monotonic/unordered fence). `$o` is a comptime ordering param. +atomic_fence :: (o: Ordering) #builtin; +fence :: ($o: Ordering) { atomic_fence(o); } + // Compare-exchange intrinsics — integer T only. The result is `?T`: // `null` = SUCCESS (the stored value equalled `expected`, replaced by `desired`); // a present value is the ACTUAL current value on failure (for a retry loop). @@ -72,6 +80,9 @@ Atomic :: struct ($T: Type) { fetch_min :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_min(T, @self.value, v, o); } fetch_max :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_max(T, @self.value, v, o); } + // Swap: store `v`, return the value BEFORE the swap (integer T). + swap :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_swap(T, @self.value, v, o); } + // Compare-exchange (integer T). Returns `?T`: `null` on success (the value // equalled `expected` and is now `desired`); on failure the ACTUAL current // value (retry with it). `compare_exchange_weak` may fail spuriously — use it diff --git a/src/backend/llvm/ops.zig b/src/backend/llvm/ops.zig index 1917cb52..1a1d634f 100644 --- a/src/backend/llvm/ops.zig +++ b/src/backend/llvm/ops.zig @@ -19,6 +19,7 @@ const AtomicLoad = ir_inst.AtomicLoad; const AtomicStore = ir_inst.AtomicStore; const AtomicRmw = ir_inst.AtomicRmw; const AtomicCmpxchg = ir_inst.AtomicCmpxchg; +const AtomicFence = ir_inst.AtomicFence; const Conversion = ir_inst.Conversion; const GlobalId = ir_inst.GlobalId; const GlobalSet = ir_inst.GlobalSet; @@ -410,10 +411,19 @@ pub const Ops = struct { .xor => c.LLVMAtomicRMWBinOpXor, .min => if (is_unsigned) c.LLVMAtomicRMWBinOpUMin else c.LLVMAtomicRMWBinOpMin, .max => if (is_unsigned) c.LLVMAtomicRMWBinOpUMax else c.LLVMAtomicRMWBinOpMax, + .xchg => c.LLVMAtomicRMWBinOpXchg, // swap }; } pub fn emitAtomicRmw(self: Ops, instruction: *const Inst, a: AtomicRmw) void { + // A.3a lock: the new `xchg` (swap) kind BAILS until A.3b. The other RMW + // kinds (A.1) keep working. + if (a.kind == .xchg) { + std.debug.print("error: atomic swap (xchg) LLVM emission not yet implemented (Stream A, A.3b)\n", .{}); + self.e.comptime_failed = true; + self.e.mapRef(c.LLVMGetUndef(self.e.toLLVMType(if (instruction.ty == .void) .i64 else instruction.ty))); + return; + } const ptr = self.e.resolveRef(a.ptr); const val = self.e.resolveRef(a.operand); const ptr_kind = c.LLVMGetTypeKind(c.LLVMTypeOf(ptr)); @@ -464,6 +474,15 @@ pub const Ops = struct { } } + // Standalone memory fence — void result, no address. singleThread = 0. + // A.3a lock: BAILS until A.3b wires LLVMBuildFence. + pub fn emitAtomicFence(self: Ops, a: AtomicFence) void { + _ = a; + std.debug.print("error: atomic fence LLVM emission not yet implemented (Stream A, A.3b)\n", .{}); + self.e.comptime_failed = true; + self.e.advanceRefCounter(); + } + pub fn emitAtomicStore(self: Ops, a: AtomicStore) void { const ptr = self.e.resolveRef(a.ptr); var val = self.e.resolveRef(a.val); diff --git a/src/ir/comptime_vm.zig b/src/ir/comptime_vm.zig index b631ef63..25cecc6f 100644 --- a/src/ir/comptime_vm.zig +++ b/src/ir/comptime_vm.zig @@ -711,6 +711,7 @@ pub const Vm = struct { const sp: i64 = @bitCast(operand); break :blk @bitCast(if (want_max) @max(so, sp) else @min(so, sp)); }, + .xchg => operand, // swap: new value IS the operand }; try self.writeField(table, frame.get(a.ptr.index()), vty, new_val); return .{ .value = old }; @@ -733,14 +734,21 @@ pub const Vm = struct { // Build the `?T` result in VM memory. const opt_ty = ins.ty; // ?T const addr = self.machine.allocBytes(table.typeSizeBytes(opt_ty), table.typeAlignBytes(opt_ty)); + // writeWord(addr, SIZE, val): write the 1-byte has_value flag + // EXPLICITLY (size=1) — never rely on alloc zero-init for the + // success/null case (a size=0 write is a no-op, correct only by + // accident; REJECTED-PATTERNS "coincidentally correct"). + const has_value_off = addr + table.typeSizeBytes(elem_ty); if (success) { - try self.machine.writeWord(addr + table.typeSizeBytes(elem_ty), 0, 1); // has_value = 0 (null) + try self.machine.writeWord(has_value_off, 1, 0); // has_value = 0 (null) } else { try self.writeField(table, addr, elem_ty, actual); // payload = actual - try self.machine.writeWord(addr + table.typeSizeBytes(elem_ty), 1, 1); // has_value = 1 + try self.machine.writeWord(has_value_off, 1, 1); // has_value = 1 } return .{ .value = addr }; }, + // A fence is a no-op at comptime (single-thread → nothing to order). + .atomic_fence => return .{ .value = 0 }, .struct_init => |agg| { const table = try self.requireTable(); const sty = ins.ty; diff --git a/src/ir/emit_llvm.zig b/src/ir/emit_llvm.zig index 1e8ee91f..ff8006c0 100644 --- a/src/ir/emit_llvm.zig +++ b/src/ir/emit_llvm.zig @@ -1569,6 +1569,7 @@ pub const LLVMEmitter = struct { .atomic_store => |a| self.ops().emitAtomicStore(a), .atomic_rmw => |a| self.ops().emitAtomicRmw(instruction, a), .atomic_cmpxchg => |a| self.ops().emitAtomicCmpxchg(instruction, a), + .atomic_fence => |a| self.ops().emitAtomicFence(a), // ── Globals ─────────────────────────────────────────── .global_get => |gid| self.ops().emitGlobalGet(instruction, gid), .global_addr => |gid| self.ops().emitGlobalAddr(gid), diff --git a/src/ir/inst.zig b/src/ir/inst.zig index a7235a3f..bedd1142 100644 --- a/src/ir/inst.zig +++ b/src/ir/inst.zig @@ -166,6 +166,7 @@ pub const Op = union(enum) { atomic_store: AtomicStore, // atomic store to pointer with memory ordering atomic_rmw: AtomicRmw, // atomic read-modify-write; result is the OLD value atomic_cmpxchg: AtomicCmpxchg, // atomic compare-exchange; result is ?T (null = success) + atomic_fence: AtomicFence, // standalone memory fence; void result // ── Struct ops ────────────────────────────────────────────────── struct_init: Aggregate, // construct struct from field values @@ -324,7 +325,7 @@ pub const AtomicStore = struct { /// Atomic read-modify-write operation kind. `min`/`max` pick the signed vs /// unsigned LLVM op (`Min`/`Max` vs `UMin`/`UMax`) from the value type's /// signedness at emit time. No `nand` (deliberately omitted). -pub const RmwKind = enum { add, sub, @"and", @"or", xor, min, max }; +pub const RmwKind = enum { add, sub, @"and", @"or", xor, min, max, xchg }; pub const AtomicRmw = struct { ptr: Ref, @@ -351,6 +352,12 @@ pub const AtomicCmpxchg = struct { weak: bool, }; +/// Standalone memory fence (`fence(.seq_cst)`) — no address, void result. The +/// ordering may NOT be `relaxed` (LLVM has no monotonic/unordered fence). +pub const AtomicFence = struct { + ordering: AtomicOrdering, +}; + pub const Conversion = struct { operand: Ref, from: TypeId, diff --git a/src/ir/lower/call.zig b/src/ir/lower/call.zig index 12f04059..bbef375a 100644 --- a/src/ir/lower/call.zig +++ b/src/ir/lower/call.zig @@ -1723,6 +1723,25 @@ fn atomicOrderingFromNode(self: *Lowering, node: *const Node) ?inst_mod.AtomicOr /// scalar of size 1/2/4/8/16. Both constraints are loud diagnostics, never silent /// defaults. Returns null if `name` is not an atomic intrinsic. pub fn tryLowerAtomicIntrinsic(self: *Lowering, name: []const u8, c: *const ast.Call) ?Ref { + // Fence is a standalone op — ordering only, no `$T`/ptr (different shape). + if (std.mem.eql(u8, name, "atomic_fence")) { + if (c.args.len != 1) { + if (self.diagnostics) |d| d.addFmt(.err, c.callee.span, "atomic_fence expects 1 argument", .{}); + return Ref.none; + } + const ordering = atomicOrderingFromNode(self, c.args[0]) orelse { + if (self.diagnostics) |d| d.addFmt(.err, c.args[0].span, "fence ordering must be a constant ordering literal", .{}); + return Ref.none; + }; + // LLVM has no monotonic/unordered fence — `.relaxed` is invalid. + if (ordering == .relaxed) { + if (self.diagnostics) |d| d.addFmt(.err, c.args[0].span, "fence ordering cannot be .relaxed (use .acquire / .release / .acq_rel / .seq_cst)", .{}); + return Ref.none; + } + self.builder.emitVoid(.{ .atomic_fence = .{ .ordering = ordering } }, .void); + return Ref.none; // fence has a void result + } + const is_load = std.mem.eql(u8, name, "atomic_load"); const is_store = std.mem.eql(u8, name, "atomic_store"); const rmw_kind = rmwKindFromName(name); // atomic_fetch_add/sub/and/or/xor/min/max @@ -1875,6 +1894,7 @@ fn rmwKindFromName(name: []const u8) ?inst_mod.RmwKind { if (std.mem.eql(u8, name, "atomic_fetch_xor")) return .xor; if (std.mem.eql(u8, name, "atomic_fetch_min")) return .min; if (std.mem.eql(u8, name, "atomic_fetch_max")) return .max; + if (std.mem.eql(u8, name, "atomic_swap")) return .xchg; // swap = exchange RMW return null; } diff --git a/src/ir/print.zig b/src/ir/print.zig index c51a9798..19532f50 100644 --- a/src/ir/print.zig +++ b/src/ir/print.zig @@ -240,6 +240,10 @@ fn printInst(instruction: *const Inst, ref_idx: u32, tt: *const TypeTable, write }, .atomic_rmw => |a| try writer.print("atomic_rmw.{s} %{d}, %{d} {s} : ", .{ @tagName(a.kind), a.ptr.index(), a.operand.index(), @tagName(a.ordering) }), .atomic_cmpxchg => |a| try writer.print("atomic_cmpxchg{s} %{d}, %{d}, %{d} {s} {s} : ", .{ if (a.weak) "_weak" else "", a.ptr.index(), a.cmp.index(), a.new.index(), @tagName(a.success_ordering), @tagName(a.failure_ordering) }), + .atomic_fence => |a| { + try writer.print("atomic_fence {s}\n", .{@tagName(a.ordering)}); + return; + }, // ── Struct ops ────────────────────────────────────────── .struct_init => |agg| { try writer.writeAll("struct_init [");