5a5e04c6d5
lowerAsmExpr stops bailing and builds the inline_asm op: resolves each operand's
effective name (§II.5 — explicit [name] else the {reg} pin), interns
template/constraints/clobbers, lowers input Refs, derives the result TypeId
(0→void, 1→T). Adds the last deferred validation (every %[name] must name an
operand). Multi-output (N>1) bails with a named "Phase E" diagnostic.
emitInlineAsm (backend/llvm/ops.zig) ports Zig's airAssembly: assembles the LLVM
constraint string (outputs → inputs → ~{clobber}, ',' → '|'), rewrites the
template (%[name]→${N}, %%→%, $→$$, %=→${:uid}), then LLVMGetInlineAsm +
LLVMBuildCall2 (AT&T dialect). Dispatch wired in emit_llvm.zig (replacing the C.0
@panic tripwire).
inferType gains an .asm_expr arm (expr_typer.zig) so a bare `x := asm {…-> T}`
binding types correctly — without it the binding inferred .unresolved and
silently produced 0.
llvm_shim.c: LLVMInitializeNativeAsmParser() — the JIT must assemble inline asm
at run time.
Verified end-to-end on the aarch64 host: `mov`/`add` with register-class inputs
and a value output run (exit 42/99), `nop volatile` runs (exit 0). IR is
textbook: `call i64 asm "add ${0},${1},${2}", "=r,r,r"(…)`.
Locked with 1645 (aarch64 add, runs; ir-only on non-aarch64) + 1646 (:= binding).
Updated 1640 (now Phase-E bail) + 1642 (now runs).
zig build test green (654 corpus, 446 unit).
11 lines
655 B
Plaintext
11 lines
655 B
Plaintext
// ASM stream Phase D — inline assembly that RUNS end-to-end. An aarch64 `add`
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// with two register-class inputs (`%[a]`, `%[b]`) and a value output (`%[out]`)
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// returned from the function. The `.build` pins aarch64-macOS: on a matching
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// host the runner executes it (exit 42); elsewhere it falls to ir-only mode and
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// asserts the `.ir` snapshot (the inline_asm op + LLVM `call asm` are target-
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// independent in the IR text). Regression for the full lower→emit→JIT path.
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add_asm :: (a: i64, b: i64) -> i64 {
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return asm { "add %[out], %[a], %[b]", [out] "=r" -> i64, [a] "r" = a, [b] "r" = b };
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}
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main :: () -> i64 { return add_asm(40, 2); }
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