17e3b91eb9
Adds ir-only x86_64 examples mirroring the aarch64 feature examples, so
each emit path is locked on both arches:
- 1657 read-write `+` → "incq ${0}", "=r,0" (tied input)
- 1658 indirect `=*m` → "movq $$42, ${0}", "=*m"(ptr elementtype i64)
- 1659 symbol `"s"` → "call ${2:P}", direct call to an exported sx fn
Each is x86-pinned (ir-only on this aarch64 host — the .ir is the
assertion; runs on x86_64-linux, main returns 0 on success / 1 if the
asm misbehaved). x86 templates validated by cross-emitting an object
(LLVM's integrated assembler accepts them; objdump confirms 1659 is a
direct `call` reloc to cb). Note: x86 direct calls need the `P` operand
modifier (`%[fn:P]`); aarch64 `bl %[fn]` needs none. Pure additive
locks, no compiler change. zig build test green (668 corpus, 446 unit).
13 lines
629 B
Plaintext
13 lines
629 B
Plaintext
// ASM stream — indirect-memory (`=*m`) place output on x86_64 (cross-arch sibling
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// of the aarch64 1652). `movq $42, %[out]` stores straight through the place's
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// address — the address is passed as an opaque `ptr` with an `elementtype(i64)`
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// attribute, no return slot. Note `$42`: a literal `$` in the template is escaped
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// to LLVM's `$$` and emitted back as `$42` (an x86 immediate). x86-pinned;
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// ir-only here, runs on x86_64-linux.
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poke :: () -> i64 {
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x : i64 = 0;
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asm volatile { "movq $42, %[out]", [out] "=*m" -> @x };
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return x; // 42
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}
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main :: () -> i64 { if poke() != 42 { return 1; } return 0; }
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