718f27e27f
fetch_add/sub/and/or/xor/min/max wired end-to-end except LLVM emission (bails
loudly; A.1b makes it real). New IR op atomic_rmw + RmwKind (no nand) +
AtomicRmw{ptr, operand, val_ty, ordering, kind}. print arm; comptime_vm arm
implements real single-thread RMW (load/compute/store/return-old, signed|unsigned
min/max from val_ty). Recognizer extended (rmwKindFromName) — RMW restricted to
integer T (float fadd / pointer RMW out of scope, rejected loudly); all orderings
valid for RMW. Methods fetch_* on Atomic($T) with comptime $o: Ordering.
examples/1701 locked to the bail. Suite green (716/0).
65 lines
3.4 KiB
Plaintext
65 lines
3.4 KiB
Plaintext
// Atomics — `Atomic($T)` wrapper + `Ordering`, over the compiler's atomic
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// load/store (later: rmw/cas/fence) IR ops. Consumers reach these through
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// std.sx (`Atomic` / `Ordering` re-exports), never by importing this file.
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//
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// Atomicity is a property of the OPERATION, not the storage: `Atomic(T)` is a
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// transparent 1-field wrapper with `T`'s exact layout/size/align. The ops are
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// `#builtin` intrinsics recognized by name at lower-time
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// (`tryLowerAtomicIntrinsic`, src/ir/lower/call.zig) and emitted as dedicated
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// atomic IR ops; the `Ordering` argument MUST be a constant enum literal.
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#import "modules/std/core.sx";
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Ordering :: enum {
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relaxed; // → LLVM Monotonic
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acquire; // → LLVM Acquire
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release; // → LLVM Release
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acq_rel; // → LLVM AcquireRelease
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seq_cst; // → LLVM SequentiallyConsistent
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}
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// Compiler intrinsics. Not called directly by users — `Atomic(T)`'s methods
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// forward to them. Recognized by name in lowering; the `Ordering` arg MUST be a
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// constant enum literal (a non-literal is a loud diagnostic).
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atomic_load :: ($T: Type, ptr: *T, o: Ordering) -> T #builtin;
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atomic_store :: ($T: Type, ptr: *T, v: T, o: Ordering) #builtin;
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// Read-modify-write intrinsics — integer T only. Each returns the OLD value.
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// `min`/`max` are signed or unsigned per T. (No `nand`.)
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atomic_fetch_add :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_sub :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_and :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_or :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_xor :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_min :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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atomic_fetch_max :: ($T: Type, ptr: *T, operand: T, o: Ordering) -> T #builtin;
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// The ordering is a COMPTIME value param (`$o`): it must be known at compile
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// time because LLVM atomic ordering is an instruction attribute, not a runtime
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// operand. It is explicit (Rust-style — no default), so the caller always states
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// the ordering: `a.load(.acquire)`, `a.store(v, .release)`. An invalid
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// combination (`a.load(.release)`) is a compile error.
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Atomic :: struct ($T: Type) {
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value: T;
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init :: (v: T) -> Atomic(T) {
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return .{ value = v };
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}
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load :: (self: *Atomic(T), $o: Ordering) -> T {
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return atomic_load(T, @self.value, o);
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}
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store :: (self: *Atomic(T), v: T, $o: Ordering) {
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atomic_store(T, @self.value, v, o);
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}
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// Read-modify-write (integer T). Each returns the value BEFORE the update.
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fetch_add :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_add(T, @self.value, v, o); }
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fetch_sub :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_sub(T, @self.value, v, o); }
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fetch_and :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_and(T, @self.value, v, o); }
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fetch_or :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_or(T, @self.value, v, o); }
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fetch_xor :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_xor(T, @self.value, v, o); }
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fetch_min :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_min(T, @self.value, v, o); }
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fetch_max :: (self: *Atomic(T), v: T, $o: Ordering) -> T { return atomic_fetch_max(T, @self.value, v, o); }
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}
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