fca4304f83
swap (atomicrmw xchg) and a standalone fence wired end-to-end except LLVM emission (both bail loudly; A.3b makes them real). - RmwKind += xchg; atomic_swap intrinsic + swap method reuse the atomic_rmw op. - new atomic_fence op (+ AtomicFence) — ordering-only, void; fence($o)/atomic_fence intrinsic; recognizer rejects .relaxed (LLVM has no monotonic fence). - comptime_vm: xchg = store operand/return old; fence = no-op (single-thread). - examples 1703 (swap) + 1704 (fence) locked to bails; 1187 (relaxed-fence reject). - 1186 converted to a direct-intrinsic call → stable user-file diagnostic span (the lib-forward-site span shifted when atomic.sx grew — fragile-snapshot fix). Also fixes a latent A.2 comptime-CAS bug found while here: the success/null has_value write was 'writeWord(addr, SIZE=0, val=1)' — a 0-byte no-op, correct ONLY because allocBytes zero-inits (REJECTED-PATTERNS 'coincidentally correct'). Now writes the flag explicitly (size=1, val=0). Suite green (721/0).
12 lines
388 B
Plaintext
12 lines
388 B
Plaintext
// Atomic($T).swap — atomic exchange (LLVM atomicrmw xchg): store the new value,
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// return the OLD one. Stream A (atomics) A.3. Single-thread.
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#import "modules/std.sx";
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#import "modules/std/atomic.sx";
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main :: () {
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a := Atomic(i64).init(7);
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old := a.swap(42, .acq_rel);
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print("swap old: {}\n", old); // 7
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print("swap now: {}\n", a.load(.acquire)); // 42
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}
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