fibers B1.3a-1: stackful context switch (naked swap_context + fiber bootstrap)
The first piece of the B1.3 fiber runtime — the stackful context switch, pure sx over abi(.naked). swap_context(from, to) saves the callee-saved registers + SP/LR into *from and loads them from *to, then rets onto to's stack (SP-in != SP-out by design — why it must be .naked). Fibers are bootstrapped by hand: the saved context starts with SP = top of an alloc_bytes stack, LR = a global-asm trampoline (mov x0, x19; bl _fib_body, reaching the sx body via export), and x19 = the *Fiber. Locked by examples/1807-concurrency-fiber-context-switch.sx (aarch64-pinned): - 2-fiber ping-pong (A <-> B, 3 rounds each): rounds: 6, and a per-fiber stack canary held live across every suspend survives (canary fails: 0); - a 64-frame deep recursive chain suspended at the bottom and resumed, verifying every frame's stack-local on the unwind (frames verified: 64, depth fails: 0). Scope (honest): exercises register/stack preservation INDIRECTLY (compiler- allocated live values + the canary). The EXPLICIT every-callee-saved GP (x19-x28) + FP (d8-d15) sentinel scribble — the full design-section-10.7 gate — is B1.3a-2, still owed. x86_64 sibling + mmap guard-page stacks are B1.3b. Suite green 733/0. Runs under JIT, ir-only on a non-arm host.
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agra
@@ -4,9 +4,24 @@ Companion to [PLAN-FIBERS.md](PLAN-FIBERS.md). Update after every step (one step
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per the cadence rule). New corpus category: `18xx` concurrency.
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## Last completed step
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**B1.2 COMPLETE — the async surface works end-to-end.** All three surface blockers (0151, 0152,
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0153) are FIXED + committed; the async examples are landed + green. Suite green **732/0**, master
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clean.
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**B1.3a-1 — the stackful context switch works (foundational + indirect survival harness).**
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Pure sx over `abi(.naked)`: a naked `swap_context(from, to)` saves callee-saved + SP/LR into
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`*from` and loads from `*to`; fibers are bootstrapped by hand (SP = top of an `alloc_bytes`
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stack, LR = a global-asm trampoline, x19 = `*Fiber`; the trampoline `mov x0, x19; bl _fib_body`).
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Locked by `examples/1807-concurrency-fiber-context-switch.sx` (aarch64-pinned, `.build
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{"target":"macos"}`, `.ir` captured): a 2-fiber ping-pong (A⇄B, 3 rounds each → `rounds: 6`) with
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a per-fiber stack canary surviving every switch (`canary fails: 0`), plus a 64-frame deep
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recursive chain suspended at the bottom and resumed, verifying every frame's stack-local on the
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unwind (`frames verified: 64` / `depth fails: 0`). Suite green **733/0**, master clean.
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- **Honest scope:** this exercises register/stack preservation INDIRECTLY (compiler-allocated
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live values + the canary), which catches a broken SP/LR or a dropped callee-saved. It does NOT
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yet EXPLICITLY scribble every callee-saved GP (x19-x28) + FP (d8-d15) with sentinels — that
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full §10.7 gate is **B1.3a-2** (a dedicated naked scribble/verify routine, see Next step).
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- The mechanism (bootstrap + naked switch + resume-mid-stack + `alloc_bytes` stacks) is proven;
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the WIP probe lives at `.sx-tmp/fib_full.sx` / `.sx-tmp/fib_probe.sx`.
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### Earlier — B1.2 COMPLETE — the async surface works end-to-end
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All three surface blockers (0151, 0152, 0153) FIXED + committed; async examples landed + green.
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- **0151 fixed** (`362674f`): generic `$T` infers through generic-struct / pointer / UFCS-pack
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params. Regression `0214` + `0215`.
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- **0152 fixed** (`e5586f6`): `Atomic(bool)` load/store byte-promoted to `i8` in the codegen
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@@ -189,11 +204,28 @@ fibers/Io/scheduler code yet. Grounded floor facts:
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boundary; a sharper sx diagnostic for it is a candidate polish, not a blocker.
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## Next step
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**B1.2 is done → start B1.3 (fiber runtime).** The compiler floor (B1.0 `abi(.naked)`, B1.1
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per-fiber `context`) + the capability surface (B1.2 Io / `async`/`await`/`cancel`) are all in.
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B1.3 builds the actual M:1 fiber scheduler on the `.naked` context-switch substrate — see
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`PLAN-FIBERS.md` for the B1.3 step list. The B1.3 switch-stress harness (design §10.7) gates the
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context-switch correctness the deterministic Io can't test.
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**B1.3a-2 — the EXPLICIT register/FP scribble gate (design §10.7), then B1.3b.** The foundational
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switch (B1.3a-1) is in; the rigorous gate is still owed. Sequence:
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1. **B1.3a-2 (explicit scribble — the real §10.7 gate):** a naked `scribble_verify(self, peer,
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base)` that loads known sentinels into EVERY callee-saved GP (x19-x28) AND FP (d8-d15), saves
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the original return addr on the stack, swaps to the peer, and on resume reads every register
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back and returns a mismatch count. Mechanism worked out: a naked fn CAN `bl swap_context` and
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resume in-place (the swap saves/restores its lr), so push the caller-return on the fiber stack
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before the swap and pop it after (sp is part of the saved context, so it round-trips). Add to
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`1807` (or a sibling `1808`); expect 0 mismatches. This is the single highest-corruption-risk
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asm in the stream — **review adversarially (worker if authorized)** per the plan.
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2. **B1.3b:** the x86_64 sibling of `swap_context` (rbx/rbp/r12-r15/rsp save area — different
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slot count + regs) + `mmap` stacks **with mandatory guard pages** (`mprotect` the low page
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`PROT_NONE`; a fixed stack without a guard silently corrupts neighbors — §8.1.1). Replace the
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`alloc_bytes` stack in `1807` with the guarded `mmap` path; add the x86_64 run sibling.
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3. Then B1.3 (fiber runtime substrate) is done → **B1.4** (`Io` impls: blocking ✅ →
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deterministic-sim KEYSTONE → event-loop) and **B1.5** (M:1 scheduler) build the real scheduler
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on top, replacing the hand-bootstrapped ping-pong with `spawn`/`yield`/`resume`.
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**Deferred (do NOT block on these):** issue **0150** (`void` struct field SIGTRAP) — only
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`Future(void)`/`timeout`, which are B1.4. The **`::` callable-parameter feature** (named-fn
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async workers `async(read_a, conn)`) — WIP at `.sx-tmp/wip-callable-params/patch.diff` (parser
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done, inference incomplete); a dedicated effort; lambda workers are the B1.2 idiom meanwhile.
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**Deferred (do NOT block on these):** issue **0150** (`void` struct field SIGTRAP) — only
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`Future(void)`/`timeout`, which are B1.4. The **`::` callable-parameter feature** (named-fn
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@@ -350,3 +382,15 @@ done, inference incomplete); a dedicated effort; lambda workers are the B1.2 idi
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42` / `double: 42` / `clock ok`) + **`1806`** (`cancel` → `await` raises `.Canceled` → `or`
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default; `ok: 7` / `canceled: -99`). **B1.2 (Io capability + M:1 async surface) is COMPLETE.**
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Next: B1.3 (fiber runtime) on the `.naked` context-switch substrate.
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- **B1.3a-1 — context switch works.** Implemented the stackful switch in pure sx over
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`abi(.naked)`: `swap_context(from, to)` (save callee-saved x19-x28 + fp/lr + sp into `*from`,
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load from `*to`, `ret` onto `to`'s stack) + by-hand fiber bootstrap (SP = top of an
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`alloc_bytes` stack, LR = a `.global _fib_tramp` global-asm trampoline that does `mov x0, x19;
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bl _fib_body`, x19 = `*Fiber`). Proven via a probe (main↔fiber), then locked by
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`examples/1807-concurrency-fiber-context-switch.sx` (aarch64-pinned): a 2-fiber ping-pong
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(`rounds: 6`, `canary fails: 0` — a per-fiber stack canary survives every switch) + a 64-frame
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deep recursive chain suspended at the bottom and resumed (`frames verified: 64` / `depth fails:
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0`). The `bl _fib_body` reaches the sx body via `export "fib_body"` (the 1655 asm→sx pattern);
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runs under JIT, ir-only on a non-arm host (`.ir` captured — `swap_context` shows `naked noinline
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nounwind`). Suite green 733/0. **Honest scope:** indirect register/stack survival only; the
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EXPLICIT every-callee-saved + FP scribble (§10.7) is B1.3a-2, still owed. Next: B1.3a-2.
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150
examples/1807-concurrency-fiber-context-switch.sx
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150
examples/1807-concurrency-fiber-context-switch.sx
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@@ -0,0 +1,150 @@
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// Stream B1 (fibers) B1.3a — the stackful context switch, in pure sx over the
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// `abi(.naked)` primitive. `swap_context(from, to)` saves the callee-saved
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// registers + SP/LR into `*from` and loads them from `*to`, then `ret`s onto
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// `to`'s stack (SP-in ≠ SP-out by design — why it must be `.naked`, not `.c`).
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// A fiber is bootstrapped by hand: its saved context starts with SP = the top
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// of a fresh `alloc_bytes` stack, LR = a global-asm trampoline, and x19 = the
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// `*Fiber` (the trampoline moves it to x0 and `bl`s the exported entry).
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//
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// This is the foundational switch + an indirect survival harness:
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// - a 2-fiber ping-pong (A ⇄ B, 3 rounds each) — resume-mid-stack across
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// switches; a per-fiber stack canary held live across every suspend must
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// survive (the compiler allocates it to a callee-saved reg / stack slot,
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// so a clobbered switch would corrupt it);
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// - a deep recursive chain (64 frames) suspended at the bottom and resumed —
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// every frame's stack-local is verified on the unwind.
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//
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// What it does NOT yet do (B1.3a-2): EXPLICITLY scribble every callee-saved GP
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// (x19-x28) + FP (d8-d15) register with sentinels and check them in asm — the
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// full §10.7 gate. This harness exercises preservation indirectly (via
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// compiler-allocated live values), which catches a broken SP/LR or a dropped
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// callee-saved, but not a single specific register the allocator didn't use.
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//
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// aarch64-pinned (the asm + the 13-slot save area are per-arch); runs
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// end-to-end here, ir-only on a mismatch. The x86_64 sibling + `mmap` guard-
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// page stacks are B1.3b.
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#import "modules/std.sx";
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// Saved context: x19..x28 (10), x29/fp, x30/lr, sp — 13 u64 slots.
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FiberCtx :: struct { regs: [13]u64; }
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Fiber :: struct {
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ctx: FiberCtx;
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peer: *FiberCtx; // ping-pong hand-off target
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finish: *FiberCtx; // where to switch when the body ends (the spawner)
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count: *i64; // shared round counter
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verified: *i64; // shared count of verified recursion frames
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rounds: i64;
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id: i64;
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mode: i64; // 0 = ping-pong, 1 = deep recursion
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canary_fail: i64;
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depth_fail: i64;
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}
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// The switch: x0 = from, x1 = to (read straight from the ABI registers — a
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// naked fn has no frame, so its params are never spilled).
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swap_context :: (from: *FiberCtx, to: *FiberCtx) abi(.naked) {
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asm volatile {
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#string ASM
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stp x19, x20, [x0, #0]
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stp x21, x22, [x0, #16]
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stp x23, x24, [x0, #32]
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stp x25, x26, [x0, #48]
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stp x27, x28, [x0, #64]
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stp x29, x30, [x0, #80]
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mov x9, sp
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str x9, [x0, #96]
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ldp x19, x20, [x1, #0]
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ldp x21, x22, [x1, #16]
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ldp x23, x24, [x1, #32]
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ldp x25, x26, [x1, #48]
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ldp x27, x28, [x1, #64]
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ldp x29, x30, [x1, #80]
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ldr x9, [x1, #96]
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mov sp, x9
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ret
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ASM
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};
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}
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// First-entry trampoline: a fiber's bootstrapped LR points here. x19 holds the
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// `*Fiber` (preset in the saved context); move it to x0 and call the body.
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asm {
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#string T
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.global _fib_tramp
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_fib_tramp:
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mov x0, x19
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bl _fib_body
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brk #0
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T,
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};
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fib_tramp :: () extern;
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// Descend `depth` frames, yield to the spawner at the bottom, then on resume
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// verify every frame's stack-local survived the switch.
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descend :: (self: *Fiber, depth: i64) -> i64 {
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if depth == 0 {
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swap_context(@self.ctx, self.finish);
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return 0;
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}
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marker : i64 = depth * 7 + 3;
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bad := descend(self, depth - 1);
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if marker == depth * 7 + 3 { self.verified.* = self.verified.* + 1; } else { bad = bad + 1; }
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return bad;
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}
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fib_body :: (self: *Fiber) export "fib_body" {
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if self.mode == 1 {
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self.depth_fail = descend(self, 64);
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swap_context(@self.ctx, self.finish);
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return;
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}
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canary : u64 = 0xCA11AB1E0000 + (xx self.id);
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i := 0;
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while i < self.rounds {
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self.count.* = self.count.* + 1;
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swap_context(@self.ctx, self.peer);
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if canary != 0xCA11AB1E0000 + (xx self.id) { self.canary_fail = self.canary_fail + 1; }
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i = i + 1;
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}
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swap_context(@self.ctx, self.finish);
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}
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STACK :: 131072;
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boot :: (f: *Fiber) {
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base : *void = context.allocator.alloc_bytes(STACK);
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top : u64 = (xx base) + STACK;
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top = top - (top % 16); // 16-byte aligned stack top (AAPCS)
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f.ctx.regs[0] = xx f; // x19 = self
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f.ctx.regs[10] = 0; // fp
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f.ctx.regs[11] = xx fib_tramp; // lr → trampoline
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f.ctx.regs[12] = top; // sp
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f.canary_fail = 0;
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f.depth_fail = 0;
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}
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main :: () -> i64 {
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main_ctx : FiberCtx = ---;
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count : i64 = 0;
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verified : i64 = 0;
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// Scenario 1: 2-fiber ping-pong with a per-fiber stack canary.
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a : Fiber = ---; a.id = 1; a.mode = 0; a.rounds = 3; a.count = @count; a.verified = @verified; a.finish = @main_ctx;
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b : Fiber = ---; b.id = 2; b.mode = 0; b.rounds = 3; b.count = @count; b.verified = @verified; b.finish = @main_ctx;
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a.peer = @b.ctx; b.peer = @a.ctx;
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boot(@a); boot(@b);
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swap_context(@main_ctx, @a.ctx);
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print("rounds: {}\n", count);
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print("canary fails: {}\n", a.canary_fail + b.canary_fail);
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// Scenario 2: a deep recursive chain suspended at the bottom, then resumed.
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c : Fiber = ---; c.id = 3; c.mode = 1; c.count = @count; c.verified = @verified; c.peer = @main_ctx; c.finish = @main_ctx;
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boot(@c);
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swap_context(@main_ctx, @c.ctx); // descend to the bottom, yields back
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swap_context(@main_ctx, @c.ctx); // resume → unwind + verify, then finish
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print("frames verified: {}\n", verified);
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print("depth fails: {}\n", c.depth_fail);
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return 0;
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}
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@@ -0,0 +1 @@
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{ "target": "macos" }
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@@ -0,0 +1 @@
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0
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16966
examples/expected/1807-concurrency-fiber-context-switch.ir
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16966
examples/expected/1807-concurrency-fiber-context-switch.ir
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File diff suppressed because one or more lines are too long
@@ -0,0 +1 @@
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@@ -0,0 +1,4 @@
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rounds: 6
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canary fails: 0
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frames verified: 64
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depth fails: 0
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