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docs: move inline-asm design doc to a top-level design/ folder

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Moves docs/inline-asm-design.md -> design/inline-asm-design.md (the
internal design record now lives under design/, separate from the
user-facing docs/). Updates all links: current/CHECKPOINT-ASM.md,
current/PLAN-ASM.md, current/PLAN-EXTERN-EXPORT.md (../docs -> ../design)
and docs/inline-assembly.md (same-dir -> ../design).
This commit is contained in:
agra
2026-06-16 07:46:01 +03:00
parent b4d1ce78c3
commit e7eeecc0f3
5 changed files with 6 additions and 6 deletions
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current/CHECKPOINT-ASM.md
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@@ -1,7 +1,7 @@
# sx Inline Assembly — Checkpoint (ASM stream)
Companion to `current/PLAN-ASM.md`; design in
[docs/inline-asm-design.md](../docs/inline-asm-design.md). Update after every
[design/inline-asm-design.md](../design/inline-asm-design.md). Update after every
commit, one step at a time per the cadence rule (no commit may both add a test
and make it pass).

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current/PLAN-ASM.md
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@@ -1,6 +1,6 @@
# sx Inline Assembly — Implementation Plan (ASM stream)
**Design source of truth:** [docs/inline-asm-design.md](../docs/inline-asm-design.md).
**Design source of truth:** [design/inline-asm-design.md](../design/inline-asm-design.md).
This plan turns that doc's §II.7 stage-map + §II.8 phasing into ordered,
commit-sized, testable steps. Read the design doc first — this file is the
*how/when*, not the *what/why*.

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current/PLAN-EXTERN-EXPORT.md
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@@ -5,7 +5,7 @@
They are *one* plan: Part B can't start until Part A is a behavior-equivalent
superset of `#foreign`, and Part A isn't "done" until Part B reaches the invariant.
**Design rationale:** [docs/inline-asm-design.md](../docs/inline-asm-design.md) §II.2
**Design rationale:** [design/inline-asm-design.md](../design/inline-asm-design.md) §II.2
(Deviation 6) + §II.10 #4 + the syntax evaluation.
**Decided syntax**
@@ -173,7 +173,7 @@ gate only the live tree (recommended) vs purge everything. Confirm 6 before Phas
> Work the FFI-linkage stream per `current/PLAN-EXTERN-EXPORT.md` (+ checkpoint
> `current/CHECKPOINT-EXTERN-EXPORT.md`). First read the plan's header (Decided
> syntax, Naming constraint, Key finding) and Part A; rationale is in
> `docs/inline-asm-design.md` §II.2 (Deviation 6) + §II.10 #4.
> `design/inline-asm-design.md` §II.2 (Deviation 6) + §II.10 #4.
>
> **This session = Part A, Phases 0 and 1 only** (`extern` works as a bare postfix
> keyword equivalent to a lib-less `#foreign` fn/global binding; `#foreign` stays

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docs/inline-asm-design.md → design/inline-asm-design.md
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docs/inline-assembly.md
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@@ -6,7 +6,7 @@ defining whole routines in assembly.
> Looking for the *why* behind the design (how it maps to LLVM, the
> Zig comparison, the emit algorithm)? That lives in
> [inline-asm-design.md](inline-asm-design.md). This page is the
> [inline-asm-design.md](../design/inline-asm-design.md). This page is the
> user-facing how-to.
---
@@ -366,7 +366,7 @@ q, r := divmod(17, 5); // (3, 2)
## See also
- [inline-asm-design.md](inline-asm-design.md) — the design rationale and
- [inline-asm-design.md](../design/inline-asm-design.md) — the design rationale and
LLVM mapping.
- `examples/16xx-platform-asm-*` — the full, runnable example matrix
(basic in/out, tuples, the three `-> @place` forms, global asm, the