atomics A.3a: swap + fence ops + recognizer, emit bails (lock)

swap (atomicrmw xchg) and a standalone fence wired end-to-end except LLVM
emission (both bail loudly; A.3b makes them real).
- RmwKind += xchg; atomic_swap intrinsic + swap method reuse the atomic_rmw op.
- new atomic_fence op (+ AtomicFence) — ordering-only, void; fence($o)/atomic_fence
  intrinsic; recognizer rejects .relaxed (LLVM has no monotonic fence).
- comptime_vm: xchg = store operand/return old; fence = no-op (single-thread).
- examples 1703 (swap) + 1704 (fence) locked to bails; 1187 (relaxed-fence reject).
- 1186 converted to a direct-intrinsic call → stable user-file diagnostic span
  (the lib-forward-site span shifted when atomic.sx grew — fragile-snapshot fix).

Also fixes a latent A.2 comptime-CAS bug found while here: the success/null
has_value write was 'writeWord(addr, SIZE=0, val=1)' — a 0-byte no-op, correct
ONLY because allocBytes zero-inits (REJECTED-PATTERNS 'coincidentally correct').
Now writes the flag explicitly (size=1, val=0). Suite green (721/0).

src/ir/inst.zig

@@ -166,6 +166,7 @@ pub const Op = union(enum) {
     atomic_store: AtomicStore, // atomic store to pointer with memory ordering
     atomic_rmw: AtomicRmw, // atomic read-modify-write; result is the OLD value
     atomic_cmpxchg: AtomicCmpxchg, // atomic compare-exchange; result is ?T (null = success)
+    atomic_fence: AtomicFence, // standalone memory fence; void result
 
     // ── Struct ops ──────────────────────────────────────────────────
     struct_init: Aggregate, // construct struct from field values
@@ -324,7 +325,7 @@ pub const AtomicStore = struct {
 /// Atomic read-modify-write operation kind. `min`/`max` pick the signed vs
 /// unsigned LLVM op (`Min`/`Max` vs `UMin`/`UMax`) from the value type's
 /// signedness at emit time. No `nand` (deliberately omitted).
-pub const RmwKind = enum { add, sub, @"and", @"or", xor, min, max };
+pub const RmwKind = enum { add, sub, @"and", @"or", xor, min, max, xchg };
 
 pub const AtomicRmw = struct {
     ptr: Ref,
@@ -351,6 +352,12 @@ pub const AtomicCmpxchg = struct {
     weak: bool,
 };
 
+/// Standalone memory fence (`fence(.seq_cst)`) — no address, void result. The
+/// ordering may NOT be `relaxed` (LLVM has no monotonic/unordered fence).
+pub const AtomicFence = struct {
+    ordering: AtomicOrdering,
+};
+
 pub const Conversion = struct {
     operand: Ref,
     from: TypeId,