Files
sx/examples/expected/1649-platform-asm-place-output.ir
agra 967005621a feat(asm): Phase 2 — -> @place write-through outputs
An asm result can be STORED through a place (a local / struct field) instead of
returned; the place output does not join the result tuple.

- parser.zig: `-> @place` parses `@place` as an ordinary address-of expression
  → an out_place operand (the in-function form; reuses the existing `@` prefix).
- inst.zig: AsmOperand gains out_ty (the output slot's value type) so emit can
  build the combined return struct without re-deriving from Inst.ty.
- lower/expr.zig: out_place operand = the lowered @place address, out_ty = the
  pointee. Read-write (`+`) and indirect-memory (`*`) constraints rejected loudly
  (not yet implemented) rather than miscompiled.
- ops.zig emitInlineAsm: the LLVM return type is built from ALL outputs
  (out_value + out_place); after the call, out_place slots are stored through
  their address and out_value slots rebuild the sx result. Fast path when there
  are no place outputs (the struct return IS the result — pure-value asm IR
  unchanged).

Verified: write-to-local (42), struct field, mixed value+place (v=10 b=20), `+`
rejected. Locked with 1649-platform-asm-place-output (mixed, runs on aarch64).

zig build test green (657 corpus, 446 unit).
2026-06-15 22:47:34 +03:00

26 lines
732 B
Plaintext

; Function Attrs: nounwind
define internal i64 @compute() #0 {
entry:
%alloca = alloca i64, align 8
store i64 0, ptr %alloca, align 8
%asm = call { i64, i64 } asm sideeffect " mov ${0}, #5\0A mov ${1}, #37\0A", "=r,=r"()
%asm.out = extractvalue { i64, i64 } %asm, 0
%asm.out1 = extractvalue { i64, i64 } %asm, 1
store i64 %asm.out1, ptr %alloca, align 8
%allocaN = alloca i64, align 8
store i64 %asm.out, ptr %allocaN, align 8
%load = load i64, ptr %allocaN, align 8
%loadN = load i64, ptr %alloca, align 8
%add = add i64 %load, %loadN
ret i64 %add
}
; Function Attrs: nounwind
define i32 @main() #0 {
entry:
%call = call i64 @compute()
%ca.tr = trunc i64 %call to i32
ret i32 %ca.tr
}