Extends lowerAsmExpr with a pinnedRegister(constraint) helper and two §II.5
operand-naming checks, in the compile path before the codegen bail:
- reject the echo form `[eax] "={eax}"` — a label identical to the register its
own constraint pins is redundant (the operand is already auto-named after the
register); the useful form is a label that differs (`[quot] "={rax}"`);
- reject duplicate operand names (ambiguous %[name] / result field).
Locked with 1643-platform-asm-echo-name and 1644-platform-asm-duplicate-name.
zig build test green (652 corpus, 445 unit).
140 lines
9.0 KiB
Markdown
140 lines
9.0 KiB
Markdown
# sx Inline Assembly — Checkpoint (ASM stream)
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Companion to `current/PLAN-ASM.md`; design in
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[docs/inline-asm-design.md](../docs/inline-asm-design.md). Update after every
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commit, one step at a time per the cadence rule (no commit may both add a test
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and make it pass).
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## Last completed step
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**B.1** — operand-name validation (design §II.5 auto-naming rule). Extended
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`lowerAsmExpr` with a `pinnedRegister(constraint)` helper (`"={eax}"`→`eax`,
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`"+{rax}"`→`rax`, `"=r"`→null) and two checks: (1) **reject the echo form**
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`[eax] "={eax}"` — a label identical to its own pinned register is redundant
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(the operand is already auto-named after the register); (2) **reject duplicate
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operand names** (ambiguous `%[name]` / result field). Locked with
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`examples/1643-platform-asm-echo-name.sx` + `1644-platform-asm-duplicate-name.sx`.
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`zig build test` green (652 corpus, 0 failed; 445 unit). Files:
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`src/ir/lower/expr.zig`.
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Prior: **B.0** — asm shape validation (compile-path diagnostics). Restructured the
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`.asm_expr` lowering arm into `lowerAsmExpr` (`src/ir/lower/expr.zig`, mixed into
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`Lowering` in `src/ir/lower.zig`): it validates BEFORE the not-yet-implemented
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codegen bail, so the user sees the real problem first. Two checklist items now
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enforced with named diagnostics: (1) **template must be a compile-time-known
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string** (`"..."` / `#string`); (2) **no value outputs ⇒ must be `volatile`**
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(mirrors Zig — a result-less asm could be deleted). Valid shapes still bail with
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the "codegen not yet implemented" message. Result-type derivation + auto-naming
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stay deferred to a later step (observable only once Phase C produces a real IR
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op). Locked with `examples/1641-platform-asm-missing-volatile.sx` (volatile
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error) + `1642-platform-asm-nop-volatile.sx` (volatile no-output accepted →
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codegen bail). `zig build test` green (650 corpus, 0 failed; 445 unit). Files:
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`src/ir/lower/expr.zig`, `src/ir/lower.zig`, `examples/164{1,2}-*`.
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Prior: **A.1** — parse `asm { … }` + loud lowering bail (folded A.1+A.2 into one honest
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lock commit, since the loud bail IS current correct behavior — cadence option
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(a)). Added `AsmExpr`/`AsmOperand` to `src/ast.zig` + the `asm_expr` `Node.Data`
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arm; `parseAsmExpr` in `src/parser.zig` (`parsePrimary` `.kw_asm` dispatch) —
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parses the template, flat operand list (`[name]? "constraint" -> Type` value
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output / `= expr` input), and `clobbers(.…)`; `volatile`/`clobbers` recognized
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contextually via `isContextualWord`. The new `asm_expr` tag forced (and got)
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arms in three exhaustive `Node.Data` switches: `src/sema.zig` `analyzeNode` +
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`findNodeAtOffset`, `src/ir/semantic_diagnostics.zig` `checkBindingNames` (all
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recurse into template + operand payloads). Lowering bails LOUD + named in
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`src/ir/lower/expr.zig` ("inline assembly codegen is not yet implemented…") via
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an explicit `.asm_expr` arm (not the generic `unknown_expr` else) returning
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`emitPlaceholder`. `-> @place` write-through is rejected with a clear "Phase 2"
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parse error. Locked with `examples/1640-platform-asm-parse.sx` (multi-output
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`divmod`, named operands, register pins, clobbers — parses then bails; called
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from `main`). `zig build test` green (648 corpus, 0 failed; 445 unit). Files:
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`src/ast.zig`, `src/parser.zig`, `src/sema.zig`, `src/ir/semantic_diagnostics.zig`,
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`src/ir/lower/expr.zig`, `examples/1640-*`.
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Prior: **A.0** — `kw_asm` keyword (first compiler code). Added the `kw_asm` `Token.Tag`
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variant + `.{ "asm", .kw_asm }` keyword-map entry in `src/token.zig`; `volatile` /
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`clobbers` deliberately stay OUT of the global table (contextual). New exhaustive
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`Tag` switch in `src/lsp/server.zig` `classifyToken` flagged the missing arm (the
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intended coverage tripwire) — added `.kw_asm` to the keyword group. Lock test in
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new `src/lexer.test.zig` (`asm`→`kw_asm`, `volatile`/`clobbers`→`identifier`),
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wired into the `src/root.zig` barrel as `lexer_tests`. `zig build test` green (648
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corpus, 0 failed; 445 unit, 0 failed — +1). Files: `src/token.zig`,
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`src/lexer.test.zig`, `src/root.zig`, `src/lsp/server.zig`.
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Prior: **0.2** — CLAUDE.md docs for `<name>.build`; **Phase 0 COMPLETE**.
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**0.1** — corpus runner **ir-only branch** for cross-target examples. Replaced
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0.0's loud placeholder bail: when `cfg.target` doesn't match the host (`ir_only`),
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`sweepRoot` skips run/build/exec and verifies via `sx ir --target` only —
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asserting `.exit` (ir cmd) + `.ir` (normalized stdout) + `.stderr`, never
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`.stdout` (write skipped in update mode, assertion skipped in verify mode). An
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`.ir` snapshot is **required** in ir-only mode — its absence is a loud failure
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("needs an .ir snapshot for ir-only mode"). Locked with
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`examples/1639-platform-target-cross.sx` (asm-free `main :: () -> i64 { return 0;
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}`), `.build` `{ "target": "x86_64-linux" }`, + checked-in `.ir`. Verified both
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guards fire: corrupting the `.ir` → IR mismatch; deleting it → the require-failure.
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`zig build test` green (647 corpus, 0 failed; 444 unit). Files:
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`src/corpus_run.test.zig`, `examples/1639-*`.
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## Current state
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Phase A underway: `asm { … }` lexes (A.0) and **parses** into `AsmExpr` (A.1);
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lowering bails LOUD + named (no IR op / emit yet). Result-type derivation, the
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operand auto-naming rule, and the validation checklist are **Phase B** (not yet
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implemented — any asm reaching lowering errors out). The adopted **operand
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auto-naming rule** (design §II.5, decided this session): name auto-derived from a
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`{reg}` pin; explicit `[name]` only when it differs or for register-class (`=r`)
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operands; echo form `[eax] "={eax}"` rejected. Parser stores `name: ?[]const u8`;
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the rule is a Phase-B (typing) concern, so the parser needs no change for it.
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Known orthogonal bug: **issue 0137** — `sx run` on a program with no `main`
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segfaults (`src/target.zig:256-273`, unguarded JIT entry lookup). Pre-existing,
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asm-independent; does NOT block the ASM stream (every example has a `main`).
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Phase B–E feasibility already confirmed against the live tree
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(`LLVMGetInlineAsm` / `LLVMBuildCall2` / `LLVMAppendModuleInlineAsm` in LLVM@19
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`Core.h`; ERR-stream `extractvalue`→tuple in `emit_llvm.zig:726-927`; lib-less
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`extern`, 60 sites; `--target` a global CLI flag).
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## Next step
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**C.0** (Phase C — IR op) — add `inline_asm: InlineAsm` to `Op` (`src/ir/inst.zig`,
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next to `objc_msg_send`) + the `AsmOperand` IR struct (role/name/constraint/operand
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as `StringId`/`Ref`), and an interp `bailDetail` arm (`src/ir/interp.zig`) — inline
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asm can never be comptime-evaluated. Unit-test the IR shape. This is a `lock`
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commit (no behavior change yet — `lowerAsmExpr` keeps bailing). Then C.1 wires
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`lowerAsmExpr` to actually intern strings + lower input `Ref`s + build the op and
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compute the result `TypeId`, at which point **result-type derivation becomes
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observable** and the auto-naming/tuple typing (`expr_typer.zig`, deferred from B)
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can be tested end-to-end. See `PLAN-ASM.md` Phase C + design §II.6.
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Remaining deferred validation (do alongside C, once template scanning is worth
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it): `%[name]` references in the template that name no operand. Needs effective-
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name resolution (explicit `[name]` ∪ auto-derived register names).
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## Log
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- (init) Plan + design doc written; ASM stream opened.
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- (0.0) Corpus runner target-gating: `<name>.build` JSON config (replaces `.aot`
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marker), `--target` threading, `hostMatchesTarget` execute-gate, loud
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cross-target placeholder bail. Migrated 1226/1227 `.aot`→`.build`; locked with
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1638 fixture + unit tests. `zig build test` green.
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- (0.1) ir-only branch: cross-target examples verify via `sx ir --target` only
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(exit+ir+stderr, no stdout; `.ir` required). Locked with 1639 fixture; verified
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corrupt-.ir → mismatch and missing-.ir → loud failure. `zig build test` green.
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- (0.2) docs: CLAUDE.md documents `<name>.build` JSON sidecar (aot + target +
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ir-only gating), replacing stale `.aot` marker prose. **Phase 0 COMPLETE.**
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- (A.0) `kw_asm` keyword in token.zig (+ map entry); LSP `classifyToken` switch
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coverage; lock test in new `lexer.test.zig` (wired via root.zig). `volatile` /
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`clobbers` stay contextual identifiers. `zig build test` green (445 unit, +1).
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- (A.1) parse `asm { … }` → `AsmExpr` + loud lowering bail; `asm_expr` arms in 3
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exhaustive `Node.Data` switches; `-> @place` rejected (Phase 2). Adopted operand
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auto-naming rule (design §II.5). Locked with 1640 fixture. Filed orthogonal
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issue 0137 (no-`main` JIT segfault). `zig build test` green (648 corpus, 445 unit).
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- (B.0) asm shape validation in `lowerAsmExpr`: comptime-string template +
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no-output⇒volatile, with named diagnostics before the codegen bail. Locked with
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1641 (volatile error) + 1642 (volatile accepted). `zig build test` green (650
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corpus, 445 unit).
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- (B.1) operand-name validation: `pinnedRegister` helper + reject echo form
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(`[eax] "={eax}"`) and duplicate names. Locked with 1643 + 1644. `zig build
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test` green (652 corpus, 445 unit).
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## Known issues
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- **0137** — `sx run` on a program with no `main` segfaults (unguarded JIT entry
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lookup, `src/target.zig:256-273`). Pre-existing, asm-independent. Filed
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`issues/0137-jit-run-no-main-segfault.md`. Does not block A.1.
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