a7ee179577
Writing a Vector lane (`v.x = …`, `.y/.z/.w` + colour aliases) panicked with "unresolved type reached LLVM emission". The store path had no vector branch: a `.field_access` target on a Vector fell through to struct-field lookup, matched nothing, left `field_ty = .unresolved`, and built a `ptrTo(.unresolved)` that tripped the LLVM emission guard. The read path resolved the lane fine — the two had diverged (issue-0083 two-resolver class). Extract a shared `Lowering.vectorLaneIndex` resolver and route BOTH paths through it. The read path (`lowerFieldAccessOnType`) delegates to it, dropping its silent `else 0` fallback. A new vector branch in `lowerAssignment` GEPs a typed pointer to the lane (`structGepTyped`) and stores via `storeOrCompound` (plain + compound). `emitStructGep` now addresses a vector base type with a `[0, lane]` GEP. A non-lane field now reports field-not-found on both paths instead of silent-lane-0 / panic. Regression: examples/1506-vectors-lane-store.sx (panicked pre-fix, now reads back written values) + a vectorLaneIndex unit test. Resolves issue 0086; spec documents element assignment.
87 lines
4.5 KiB
Markdown
87 lines
4.5 KiB
Markdown
# 0086 — writing to a Vector lane (`v.x = …`) panics with "unresolved type reached LLVM emission"
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> **RESOLVED** (F0.5).
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>
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> **Root cause.** The vector-lane STORE path had no vector branch. In
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> `Lowering.lowerAssignment` (`src/ir/lower.zig`) a `.field_access` target on a
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> `Vector` fell through to the struct-field lookup, where no field matched a
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> lane name, so `field_ty` stayed `.unresolved`. The store then built a
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> `ptrTo(.unresolved)` whose pointee reached LLVM in `emitStore`
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> (`src/backend/llvm/ops.zig`) → `toLLVMTypeInfo` `.unresolved` tripwire panic.
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> The READ path resolved the lane fine; the two paths had diverged (issue-0083
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> two-resolver class).
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>
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> **Fix (per file).**
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> - `src/ir/lower.zig` — extracted a shared `Lowering.vectorLaneIndex(field)`
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> resolver (`.x/.y/.z/.w` + colour aliases `.r/.g/.b/.a` → lane 0..3, `null`
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> otherwise). The READ path (`lowerFieldAccessOnType`) now delegates to it
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> (dropping its silent `else 0` fallback), and a new vector branch in
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> `lowerAssignment` uses the SAME resolver to `structGepTyped` a typed pointer
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> to the lane and `storeOrCompound` with the vector element type (plain and
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> compound assignment). A non-lane field now reports a field-not-found error on
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> both paths instead of silently reading lane 0 / panicking.
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> - `src/backend/llvm/ops.zig` — `emitStructGep` now addresses a vector
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> `base_type` with a `[0, lane]` `GEP2`, yielding a pointer to the lane element
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> for the scalar store.
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>
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> **Regression test.** `examples/1506-vectors-lane-store.sx` — `.[…]`-init and
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> `= ---`-init writes, every lane of a 4-lane vector, colour aliases, and a
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> compound lane assignment, reading each value back. Unit test
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> `src/ir/lower.test.zig` pins the `vectorLaneIndex` contract.
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## Symptom
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Assigning to a component of a `Vector` local — `v.x = 1.0` (also `.y` / `.z` /
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`.w`) — aborts the compiler with the internal panic:
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```
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thread … panic: unresolved type reached LLVM emission — a type resolution
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failure was not diagnosed/aborted
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src/backend/llvm/types.zig:175 toLLVMTypeInfo (.unresolved arm @panic)
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src/backend/llvm/ops.zig:358 emitStore (.pointer => toLLVMType(p.pointee))
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```
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READING a lane (`x := v.x`) is fine; only the STORE side hits it. The init form
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(`= ---` undefined vs `= .[…]` literal) does not matter — both panic once a lane
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is written. A literal lane count (`Vector(3, f32)`) triggers it, so this is NOT
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the lane-count resolution class (issue 0083); it is a distinct bug in the
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vector-lane **store** path, where the store's pointee type resolves to the
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`.unresolved` sentinel instead of the lane element type.
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Discovered while fixing issue 0083 (attempt 5). It is pre-existing and orthogonal
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— confirmed by reproducing on the pristine pre-0083-attempt-5 compiler — so it was
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NOT introduced by the lane-count fix. The standard vector idiom (construct via a
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`.[…]` literal / a constructor function returning `.[…]`, then read components or
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use vector arithmetic, as in `examples/1500-vectors-vector-math.sx`) is
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unaffected; only component ASSIGNMENT is broken.
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## Reproduction
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```sx
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#import "modules/std.sx";
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main :: () {
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v : Vector(3, f32) = .[0.0, 0.0, 0.0];
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v.x = 1.0; // panic here
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print("x={}\n", v.x);
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}
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```
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`./zig-out/bin/sx run` panics. Removing the `v.x = 1.0` line (read-only) prints
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`x=0.000000` and exits 0.
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## Investigation prompt
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A store to a `Vector` lane (`v.x = …`) lowers a pointer-to-lane whose pointee
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type reaches LLVM as `.unresolved`, so `emitStore`
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(`src/backend/llvm/ops.zig:358`, the `.pointer => toLLVMType(p.pointee)` arm)
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hits the `.unresolved` tripwire panic in
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`src/backend/llvm/types.zig:175`. The lane READ path computes the lane element
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type correctly, so compare the lvalue/store lowering for a vector-component
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assignment against the rvalue/load path — the component-write path is likely
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building the lane pointer's pointee from a vector `.x`/`.y`/`.z`/`.w` field
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resolution that returns `.unresolved` (or a vector field-access that resolves the
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element type on load but not on store). Find where a `Vector` swizzle/component
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assignment lowers its destination pointer (grep for vector component handling in
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`lower.zig` assignment lowering and in the LLVM `emitStore` GEP path) and resolve
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the lane element type there the same way the load path does. Verify with the
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repro (expect `x=1.000000`) plus a `.[…]`-init write and a write to each of
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`.x/.y/.z/.w` on a 4-lane vector, then `zig build && zig build test && bash
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tests/run_examples.sh` green.
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